The low-cost, scalable technology enables seamless integration of high-speed gallium nitride transistors onto a standard silicon chip.
Gallium nitride is an advanced semiconductor material that is expected to play a key role in the next generation of high-speed communication systems and the power electronics that support modern data centers.
However, the widespread use of gallium nitride (GaN) has been limited by its high cost and the specialized techniques required to incorporate it into standard electronic systems.
To address these challenges, researchers from MIT and collaborating institutions have developed a new fabrication process that integrates high-performance GaN transistors onto standard silicon CMOS chips. The approach is low-cost, scalable, and compatible with current semiconductor manufacturing processes.
The method involves fabricating numerous tiny transistors on the surface of a GaN chip, cutting them out individually, and bonding only the required transistors onto a silicon chip. This is done using a low-temperature technique that maintains the performance of both materials.
Because only a small amount of GaN is added to each chip, costs stay low. At the same time, the device benefits from a major performance boost thanks to the compact, high-speed transistors. By distributing the GaN transistors across the silicon chip, the process also helps lower the system’s overall temperature.
Using this method, the researchers built a power amplifier, a critical component in mobile phones, that delivers stronger signals and greater efficiency than traditional silicon-based versions. In a smartphone, this could lead to clearer calls, faster wireless connections, better overall connectivity, and longer battery life.
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